Low-Power Deep Sub-Micron CMOS Logic

Low-Power Deep Sub-Micron CMOS Logic

Author: P. van der Meer

Publisher: Springer Science & Business Media

ISBN: 9781402028496

Category: Technology & Engineering

Page: 154

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1. 1 Power-dissipation trends in CMOS circuits Shrinking device geometry, growing chip area and increased data-processing speed performance are technological trends in the integrated circuit industry to enlarge chip functionality. Already in 1965 Gordon Moore predicted that the total number of devices on a chip would double every year until the 1970s and every 24 months in the 1980s. This prediction is widely known as "Moore's Law" and eventually culminated in the Semiconductor Industry Association (SIA) technology road map [1]. The SIA road map has been a guide for the in dustry leading them to continued wafer and die size growth, increased transistor density and operating frequencies, and defect density reduction. To mention a few numbers; the die size increased 7% per year, the smallest feature sizes decreased 30% and the operating frequencies doubled every two years. As a consequence of these trends both the number of transistors and the power dissi pation per unit area increase. In the near future the maximum power dissipation per unit area will be reached. Down-scaling of the supply voltage is not only the most effective way to reduce power dissipation in general it also is a necessary precondition to ensure device reliability by reducing electrical fields and device temperature, to prevent device degradation. A draw-back of this solution is an increased signal propa gation delay, which results in a lower data-processing speed performance.
Low-Power Deep Sub-Micron CMOS Logic
Language: en
Pages: 154
Authors: P. van der Meer, A. van Staveren, Arthur H.M. van Roermund
Categories: Technology & Engineering
Type: BOOK - Published: 2012-12-06 - Publisher: Springer Science & Business Media

1. 1 Power-dissipation trends in CMOS circuits Shrinking device geometry, growing chip area and increased data-processing speed performance are technological trends in the integrated circuit industry to enlarge chip functionality. Already in 1965 Gordon Moore predicted that the total number of devices on a chip would double every year until
Matching Properties of Deep Sub-Micron MOS Transistors
Language: en
Pages: 206
Authors: Jeroen A. Croon, Willy M Sansen, Herman E. Maes
Categories: Technology & Engineering
Type: BOOK - Published: 2006-06-20 - Publisher: Springer Science & Business Media

Matching Properties of Deep Sub-Micron MOS Transistors examines this interesting phenomenon. Microscopic fluctuations cause stochastic parameter fluctuations that affect the accuracy of the MOSFET. For analog circuits this determines the trade-off between speed, power, accuracy and yield. Furthermore, due to the down-scaling of device dimensions, transistor mismatch has an increasing
Power Management of Digital Circuits in Deep Sub-Micron CMOS Technologies
Language: en
Pages: 186
Authors: Stephan Henzler
Categories: Technology & Engineering
Type: BOOK - Published: 2006-11-24 - Publisher: Springer Science & Business Media

This book provides an in-depth overview of design and implementation of leakage reduction techniques. The focus is on applicability, technology dependencies, and scalability. The book mainly deals with circuit design but also addresses the interface between circuit and system level design on the one side and between circuit and physical
Low-Power Low-Voltage Sigma-Delta Modulators in Nanometer CMOS
Language: en
Pages: 158
Authors: Libin Yao, Michiel Steyaert, Willy M Sansen
Categories: Technology & Engineering
Type: BOOK - Published: 2006-07-09 - Publisher: Springer Science & Business Media

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Ulsi Front-end Technology: Covering From The First Semiconductor Paper To Cmos Finfet Technology
Language: en
Pages: 248
Authors: Lau Wai Shing
Categories: Technology & Engineering
Type: BOOK - Published: 2017-08-23 - Publisher: World Scientific

The main focus of this book is ULSI front-end technology. It covers from the early history of semiconductor science & technology from 1874 to state-of-the-art FINFET technology in 2016. Some ULSI back-end technology is also covered, for example, the science and technology of MIM capacitors for analog CMOS has been